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八核心平行處理單晶片 (FPPA) 介紹 

Frank Chen  
HY-STAR TECHNOLOGY CO.,LTD

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八核心平行處理單晶片 (FPPA) 介紹 

八核心單晶片有什麼優點:

相信許多研發人員都有選擇 MCU 的痛苦經驗, 選這顆 MCU 少個 UART,選那顆 Timer 又不夠,就算選好了 MCU,寫多功 (Muti-Task)的軟體才是真正痛苦的開始.
應廣科技 (Padauk )八核心平行處理單晶片 Field Programmable Processor Array, 以下簡稱 “FPPA”,利用八核心平行處理可一次解決軟體“Muti-Task” ,“Timer” 和 MCU 所需的各種周邊的困擾.有八顆 MCU 平行處理,不用再煩惱多工軟體,有八顆 MCU 平行處理等於有八個 Timer,不用再煩惱 Timer 不夠,有八顆 MCU 平行處理,拿幾顆來寫 UART,I2C,SPI,PWM 等周邊就不用再煩惱介面不夠.

 

 

FPPA 架構介紹

如上圖所示

 


產品特色 Features

 



內建硬體的即時作業系統 (hardware RTOS)

FPPA 最多可有 8 顆 MCU 同時平行處理, FPPA 有一“pmode”指令可調整每一 MCU 的速度,FPPA 根據“pmode”由硬體強制去分配的每一 MCU 的 bandwidth 來完成類似軟體 RTOS 的功能 (如下表),完全不用寫軟體的 RTOS.

pmode FPP0 FPP1 FPP2 FPP3 FPP4 FPP5 FPP6 FPP7
0 1/2 1/8 1/16 1/16 1/16 1/16 1/16 1/16
1 1/4 1/4 1/8 1/8 1/16 1/16 1/16 1/16
2 1/8 1/8 1/8 1/8 1/8 1/8 1/8 1/8
3 1/2 1/8 1/8 1/8
4 1/4 1/4 1/4 1/8 1/8
5 1/16 1/4 1/4 1/4 1/16 1/16 1/16
6 1/16 1/2 1/8 1/16 1/16 1/16 1/16 1/16
7 1/8 1/2 1/8 1/8 1/8

如下圖為 pmode =2 , 平均每一 MCU 分配 1/8 system clock

<pmode =2>

下圖為 pmode=0 ,FPP#0 = 1/2 system clock, FPP#1 = 1/4 system clock, FPP#2-FPP#7 = 1/16 system clock ,每個 FPP 的 cycle 如下

<pmode=0>

 

 

FPPA暫存器 (Registers) 說明

Name Address Function
flag    0x00       Arithmetic status flag 
fppen   0x01     FPP unit enable register
sp       0x02         Stack pointer 
clkmd   0x03 Clock mode register
inten   0x04    Interrupt enable register
intrq   0x05     Interrupt request register
t16m    0x06       Timer 16 mode register
gdio   0x07       General data register for IO
mulop 0x08  One operand for multiplication
mulrh   0x09         High byte result of multiplication (read only)
eoscr   0x0a      External oscillator setting register
ihrcrl  0x0b        Internal high RC oscillator control register low
Ihrcrh 0x0c        Internal high RC oscillator control register high
pa       0x10       Port A data register
pac      0x11         Port A control register
paph    0x12        Port A pull high register
paod     0x13        Port A open drain register
pb      0x14       Port B data register
pbc      0x15         Port B control register
pbph    0x16      Port B pull high register
pbod    0x17       Port B open drain register
pc       0x18       Port C data register
pcc     0x19       Port C control register
pcph     0x1a       Port C pull high register
pcod     0x1b       Port C open drain register
pd      0x1c         Port D data register
pdc     0x1d        Port D control register
pdph   0x1e       Port D pull high register
pdod    0x1f         Port D open drain register
pe      0x30      Port E data register
pec     0x31        Port E control register
peph   0x32         Port E pull high register
peod    0x33        Port E open drain register

PPA 共有 33 個暫存器(不同系列暫存器略有不同),其中 address 0x10 – 0x32 各為 I/O Port A – Port E 的控制暫存器,故真正要注意的 register 只有 13 個,不像其他 MCU,周邊控制 (如PWM,I2C,UART 等)的 register 就好幾拾個,故 FPPA 很容易學習U. 13個 register 中比較容易引起誤解,或 datasheet 描述不易理解的地方特別提出說明.

FPPA 軟體規劃

如上圖所示,和大多數的 MCU 一樣,FPPA 也有所謂 “中斷向量表”的概念,只是一般 MCU 的中斷向量是“中斷副程式” 的進入位置,FPPA 的中斷向量是各 FPP 的進入位置.如上圖中 address 0h-7h 分別為 FPP#0-7 的進入位置,address 0x10 才是“中斷副程式” 的進入位置,故其程式寫法如下

 

 

 

FPPA 指令介紹 (Instructions Set)

 

FPPA Instructions Set
Data Transfer Instructions (16)
Instruction Function
mov     a,I Move immediate data to ACC。
mov     M,a Move data from ACC to memory
mov     a,M Move data from memory to ACC
mov     a,IO Move data from IO to ACC
mov     IO,a Move data from ACC to IO
pushw   index Move the content of index to be the content of stack pointer
pushw   pcN Move the content of program counter of Nth FPP unit to be the content of stack pointer
popw    index Restore the content of stack pointer to be the content of index
popw    pcN Restore the content of stack pointer to be the content of program counter of the Nth FPP unit
ldtabh  index Load high byte data in OPT to ACC by using index as OPT address
ldtabl  index Load low byte data in OTP to ACC by using index as OTP address
ldt16   index Move 16-bit counting values in Timer16 to memory which is addressed by index
stt16   index Store 16-bit data from memory addressed by index to Timer16
idxm    a,index Move data from specified memory to ACC by indirect method
idxm    index,a Move data form ACC to specified memory by indirect method
xch     M Exchange data between ACC and memory
Arithmetic Operation Instructin (20)
add     a,I Add immediate data with ACC, then put result in ACC
add     a,M Add data in memory with ACC, then put result in ACC
add     M,a Add data in memory with ACC, then put result in ACC
addc    a,M Add data in memory with ACC and carry bit, then put result in ACC
addc    M,a Add data in memory with ACC and carry bit, then put result in memory
addc    a Add carry with ACC, then put result in ACC
addc    M Add carry with memory, then put result in memory
nadd    a,M Add negative logic (2's complement) of ACC with memory
nadd    M,a Add negative logic (2's complement) of memory with ACC
sub     A,I Subtraction immediate data from ACC, then put result in ACC.
sub     a,M Subtraction data in memory from ACC, then put result in ACC.
sub     M,a Subtraction data in ACC from memory, then put result in memory
subc    a,M Subtraction data in memory and carry from ACC, then put result in ACC
subc    M,a Subtraction ACC and carry bit from memory, then put result in memory
subc    a Subtraction carry from ACC, then put result in ACC
subc    M Subtraction carry from the content of memory, then put result in memory
inc     M increment the content of memory
dec     M Decrement the content of memory
clear   M Clear the content of memory
mul  Multiplication operation. An 8x8 unsigned multiplication will be executed.
Shift Operation Instructions (11)
sr      a Shift right of ACC
src     a Shift right of ACC with carry
sr      M Shift right the content of memory
src     M Shift right of memory with carry
sl      a Shift left of ACC
slc     a shift left of ACC with carry
sl      M Shift left of memory
slc     M Shift left of memory with carry
swap    a Swap the high nibble and low nibble of ACC
swap    M Swap th high nibble and low nibble of memory
Logic Operation Instructions (16)
and     a,I Perform logic AND on ACC and immediate data, then put result in ACC
and     A,M Perform logic AND on ACC and memory, then put result in ACC
and     M,a Perform logic AND on ACC and memory, then put result in memory
or      a,I Perform logic OR on ACC and immediate data, then put result in ACC
or      a,M Perform logic OR on ACC and memory, then put result in ACC
or      M,a Perform logic OR on ACC and memory, then put result in memory
xor     a,I Perform logic XOR on ACC and immediate data, then put result in ACC
xor     a,M Perform logic XOR on ACC and memory, then put result in ACC
xor     M,a Perform logic XOR on ACC and memory, then put result in memory
not     a Perform 1's complement (logical complement) of ACC
not     Mry Perform 1's complement (logical complement) of memo
neg     a Perform 2's complement of ACC
neg     M Perform 2's complement of memory
comp    a,I Compare ACC with immediate data
comp    a,M Compare ACC with the content of memory
comp    M,a Compare ACC with the content of memory
Operation Instructions (6)
set0    IO.n  Set bit n of IO port to low
set1    IO.n Set bit n of IO port to high
tog     IO.n Toggle bit state of bit n of IO port
set0    M.n Set bit n of memory to low
set1    M.n Set bit n of memory to high
swapc   IO.n Swap the n-th bit of IO port with carry bit
Conditonal Operation Instructions (13)
ceqsn   a,I Compare ACC with immediate data and skip next instruction if both are equal
ceqsn   a,M Compare ACC with memory and skip next instruction if both are equal
cesn    M,a Compare ACC with memory and skip next instruction if both are equal
t0sn    IO.n Check IO bit and skip next instruction if it's low
t1sn    IO.n Check IO bit and skip next instruction if it's high
t0sn    M,n Check memory bit and skip next instruction if it's low
t1sn    M,n Check memory bit and skip next instruction if it's high
izsn    a increment ACC and skip next instruction if ACC is zero
dzsn    a Decrement ACC and skip next instruction if ACC is zero
izsn    M Increment memory and skip next instruction if memory is zero
dzsn    M Decrement memory and skip next instruction if memory is zero
wait0   IO.n Go next instruction until bit n of IO power is low; otherwise, wait here
wait1   IO.n Go next instruction until bit n of IO power is high; otherwise, wait here

FPPA 共有97 個 (不同系列,指令略有增減)1T RISC type 功能強大的指令.大部分的指令看 datasheet 就知道其用法,不再多敘,這裡只介紹比較容易引起誤解,或 datasheet 敘述不容易理解的地方特別提出說明

  1. wait0,wait1: 只能針對 I/O 或 register “gdio”,但不能對記憶體, 其功能如流程圖所示,一直要等到 I/O 或 gdio.x =0 或 1 成立才往下繼續執行,因傳統的 MCU,只有一顆 MCU,故無法去實現這種指令,否則如果條件不成立,程式就一直停在那,形同“當機”.

 

  1. delay :直接 delay x 個 system clock 才往下繼續執行, 例如 system clock = 8Mhz,pmode = 0,FPP#0 執行 “delay 100” =100*1/4M = 25us,但 FPPA#1執行“delay 100” = 100 * 1/1M = 100us.
  2. pushw,popw: push & pop 程式指標

由 於 PFPA 是一顆 8 核心的 MCU,不同 MCU 間可更改彼此的程式指標 “pc”, 來達到強迫其他 MCU 去執行某段程式的路徑之目的,但要小心運用,否則容易破壞程式的結構.下例中的 FPP#0 原本只會在 LOOP_A無窮的回圈中打轉, FPP#1 經由“pushw” 和 “popw” 改變 了FPP#0 的程式指標, 讓 FPP#0 變在 LOOP_B無窮回圈中打轉.